In my spare time over the past couple of weeks I was looking into why do cpu manufacturers advertise the amount of cache they have in their cpus. It made me start to wonder. In video games people want to have as much L3 cache as possible but for work stations they might want a mixture of L1 and L2 cache instead of L3 cache. After reading a few articles, the cpu cache is made of SRAM (Static Random Access Memory). Which is high speed memory located very close to the cpu and it is volatile memory. The purpose of cache is so that the cpu can access data really quickly to complete the operation.
Then it made me start to think about the differences between the three different caches. Let me start off with L1 cache.
L1 Cache
- Is made within the cpu core
- L1 is the closest and smallest out of the others
- L1 size is around 16KB – 128KB depending on cpu model
- L1 is directly mapped on the main memory blocks to improve speed of data
- The main purpose of L1 is to store the data and instructions that the cpu uses the most
- L1 access data within 1 – 3 clock cycles
L2 Cache
- Is either core specific or shared between other cores
- The size ranges between 256KB – 2MB
- L2 access data within 3 – 10 clock cycles
- The purpose of L2 cache is very similar to L1 it is just that the LRU (least recently used) decides whether to have the data be in L1 or L2
- L2 cache can be direct-mapped, set-associative or fully-associative just depends on cpu
- It also helps L1 to store additional data if needed
L3 Cache
- L3 cache is shared with multiple cores
- Are the furthest from the cpu cores
- Has the most capacity out of the group, which ranges between 2MB -64MB or more
- It has the same purpose of L2 cache but the LRU manages which data is sent to the L3 or L2
- Slowest speed it takes 10 – 20 or more clock cycles to access data
- L3 cache data can be manipulated and other cores can see the new data
- In order to help maintain consistency between shared cores
- L3 cache associativity is 4 way or more mapped
Even though the advancements of cpu manufacturers are trying to push the limits of cache it is still dependent on the users’ need for them.
From the blog CS@Worcester – Site Title by Ben Santos and used with permission of the author. All other rights reserved by the author.

